Search found 3 matches

by GayathriJeyaram
Wed May 28, 2014 11:30 am
Forum: Digital Design
Topic: Designing a NAND gate with "my gate"
Replies: 1
Views: 1572

Re: Designing a NAND gate with "my gate"

First level,
2 gates. Gate 1 has inputs 0 and A. Gate 2 has inputs B and 1.

Second level
1 gate. Gate 3 has inputs output of gate 1 and output of gate 2.

Note,
In the description of the gates above with boolean function y= A+B' , the first input is A pin and second input is B pin.
by GayathriJeyaram
Thu May 01, 2014 11:42 am
Forum: Physical Design (PD)
Topic: How does DFT logic affect PD ?
Replies: 2
Views: 2000

How does DFT logic affect PD ?

How does mbist logic affect placement ? Will knowing the algorithms used to assign controllers help in floorplan ? How does scan chain affect PD ?
by GayathriJeyaram
Thu May 01, 2014 1:18 am
Forum: IC Fabrication Technology
Topic: Why silicon is used for the fabrication of IC fabrication.
Replies: 3
Views: 10303

Re: Why silicon is used for the fabrication of IC fabricatio

Silicon is less temperature sensitive and freely available.

Initially, Ge was used more than Si as the methods to purify Si weren't developed.