Search found 59 matches

by Narveer
Fri Aug 21, 2015 7:14 pm
Forum: Device Physics
Topic: NMOS is GOOD '0' AND BAD '1'
Replies: 1
Views: 8530

Re: NMOS is GOOD '0' AND BAD '1'

Please check below post.

viewtopic.php?f=11&t=6
by Narveer
Sat Apr 11, 2015 10:30 am
Forum: Physical Design (PD)
Topic: Metal Layers in the chip
Replies: 3
Views: 4340

Re: Metal Layers in the chip

Correct! Top layer are used for power & ground as they are thicker & hence less resistive. Lower layers are used for signal routing. But there is no hard & fast rule for this.
by Narveer
Tue Apr 07, 2015 2:35 pm
Forum: Physical Design (PD)
Topic: Height of standard cells
Replies: 2
Views: 2083

Re: Height of standard cells

Standard cells in a library are rectangular with the same height but different widths. The key aspect with these libraries is that they are of a fixed height, which enables them to be placed in rows, easing the process of automated digital layout. The cells are typically optimized full-custom layout...
by Narveer
Sun Nov 09, 2014 9:29 pm
Forum: Interview Material
Topic: verilog objective questions
Replies: 2
Views: 3202

Re: verilog objective questions

Verilog interview interview questions with answer.!!!
by Narveer
Tue Nov 04, 2014 2:33 pm
Forum: Interview Material
Topic: fresher interview material links
Replies: 0
Views: 2454

fresher interview material links

Hi All, Below links will be helpful for freshers who are preparing for VLSI industry. 1. http://www.exploreroots.com/d0.html 2. http://www.asic.co.in/ 3. http://www.asic-world.com/ 4. http://asic-soc.blogspot.com/ 5. http://chipverification.blogspot.com/ 6. http://only-vlsi.blogspot.com/ 7. http://g...
by Narveer
Thu Oct 09, 2014 5:59 pm
Forum: Job info
Topic: Freshers openings in HLS Asia
Replies: 2
Views: 2386

Freshers openings in HLS Asia

Urgent opening for M.Sc. Electronics in HLS Asia (Both boys and Girls). Please forward resume to shobhini.srivastava@hlsasia.com
by Narveer
Wed Sep 10, 2014 8:39 pm
Forum: Embedded Systems
Topic: Micro-processor Cache.
Replies: 1
Views: 5282

Re: Micro-processor Cache.

Cache memory is used to store frequently used data/instruction to improve the performance. A processor may have up to 3 level of cache i.e. L1, L2 & L3 cache. Out of these three L1 is fastest & L3 is slowest. The L1 cache typically ranges in size from 8KB to 64KB and uses the high-speed SRAM (static...
by Narveer
Wed Aug 27, 2014 2:21 pm
Forum: Physical Design (PD)
Topic: power planing
Replies: 1
Views: 1865

Re: power planing

Mahesh, I have documents related to power planning. Please go through them. If still you have any doubt, you can post it here.
by Narveer
Sun Aug 17, 2014 7:18 pm
Forum: Embedded Systems
Topic: Why Dual Core, Quad Core And Octa Core....????
Replies: 2
Views: 2120

Re: Why Dual Core, Quad Core And Octa Core....????

You can even make a processor of 10 GHZ or more with today available. Si technology at 45 nm node but why to do so .......???? when it is of no use...... we are shrinking the size not to increase the speed of processor now a days .... it is only for increasing the storage capacity (i.e Memories) for...