Search found 45 matches

by Arvind
Wed Apr 09, 2014 8:31 pm
Forum: Frontend Architecture & Verification
Topic: Why latches are not preferred in synthesized design?
Replies: 1
Views: 7098

Why latches are not preferred in synthesized design?

Why latches are not preferred in synthesized design?
by Arvind
Wed Apr 09, 2014 8:30 pm
Forum: Frontend Architecture & Verification
Topic: Difference between inter statement and intra statement delay
Replies: 0
Views: 6658

Difference between inter statement and intra statement delay

What is the difference between inter statement and intra statement delay?
by Arvind
Wed Apr 09, 2014 8:29 pm
Forum: Frontend Architecture & Verification
Topic: Difference between casex, casez and case statements
Replies: 0
Views: 6601

Difference between casex, casez and case statements

What is the difference between casex, casez and case statements in verilog?
by Arvind
Wed Apr 09, 2014 7:49 pm
Forum: Physical Design (PD)
Topic: What is useful skew ? How it helps in achieving timing?
Replies: 0
Views: 2709

What is useful skew ? How it helps in achieving timing?

What is useful skew ? How it helps in achieving timing?
by Arvind
Wed Apr 09, 2014 7:34 pm
Forum: IC Fabrication Technology
Topic: Design for manufacturability (DFM)
Replies: 1
Views: 8092

Design for manufacturability (DFM)

What is DFM (Design for manufacturability)? Why it is so important at lower technology nodes?
by Arvind
Wed Apr 09, 2014 6:32 pm
Forum: Design For Testing (DFT)
Topic: Difference between Stuck-at Fault and Transition Fault
Replies: 1
Views: 7888

Difference between Stuck-at Fault and Transition Fault

What is difference between Stuck-at Fault and Transition Fault?
by Arvind
Wed Apr 09, 2014 6:00 pm
Forum: Physical Design (PD)
Topic: Differnce between a normal buffer & a clock buffer?
Replies: 0
Views: 3055

Differnce between a normal buffer & a clock buffer?

What is the difference between a normal buffer & a clock buffer?
by Arvind
Wed Apr 09, 2014 5:57 pm
Forum: Physical Design (PD)
Topic: Why do we use alternate layer HVH/VHV routing?
Replies: 1
Views: 3779

Why do we use alternate layer HVH/VHV routing?

Why do we use alternate layer horizontal/vertical/horizontal (HVH or VHV) routing?
by Arvind
Wed Apr 09, 2014 5:52 pm
Forum: Digital Design
Topic: Inveter/Buffer using XOR gate
Replies: 1
Views: 2775

Inveter/Buffer using XOR gate

How will you build a inverter using single XOR gate? How will you build a buffer using single XOR gate?
by Arvind
Wed Apr 09, 2014 4:09 pm
Forum: Digital Design
Topic: Double the clock frequency using combinational compoents
Replies: 1
Views: 2419

Double the clock frequency using combinational compoents

How to generate multiply by 2 clock using digital circuit? Multiply clock without using a PLL?