Search found 22 matches

by RENU
Fri Dec 19, 2014 4:46 pm
Forum: Design For Testing (DFT)
Topic: What is a lock-up latch & why it used in DFT
Replies: 4
Views: 14375

Re: What is a lock-up latch & why it used in DFT

Please find good link related to lockup-latch as :-
http://www.google.com/patents/US20130179742
by RENU
Tue Oct 14, 2014 6:29 pm
Forum: Design For Testing (DFT)
Topic: Ring Oscllators use in chips??
Replies: 0
Views: 6098

Ring Oscllators use in chips??

Why ring oscillators used on chips these days ??
by RENU
Tue Sep 02, 2014 12:28 pm
Forum: Synthesis & Timing
Topic: Use of syncronizers in VLSI?
Replies: 0
Views: 6552

Use of syncronizers in VLSI?

What is use of syncronizers in VLSI ? How to decide where we have to use syncronizers in design?
by RENU
Fri Jun 20, 2014 7:29 pm
Forum: Synthesis & Timing
Topic: Reasons for unconstrained endpoints in timing?
Replies: 1
Views: 11463

Reasons for unconstrained endpoints in timing?

What are the reasons for unconstrained endpoints in timing?
by RENU
Fri Jun 20, 2014 1:50 pm
Forum: Embedded Systems
Topic: What is the Difference between Simulator and Emulator ?
Replies: 5
Views: 22282

Re: What is the Difference between Simulator and Emulator ?

The Simulator tries to duplicate the behavior of the device.
The Emulator tries to duplicate the inner workings of the device.
by RENU
Mon Jun 16, 2014 8:14 pm
Forum: Design For Testing (DFT)
Topic: How to lower cost of DFT
Replies: 1
Views: 6329

Re: How to lower cost of DFT

DFT cost can be reduced by below options :-

1. By increasing scan-shift/tck frequency .
2. Reducing pattern volume.
3. By taking care of Scan chain length as there should not be any case where one scan chain is too lengthy and others are short.
by RENU
Mon Jun 16, 2014 8:08 pm
Forum: Design For Testing (DFT)
Topic: What are typical frequencies for scan shift, MBIST tests?
Replies: 2
Views: 7085

Re: What are typical frequencies for scan shift, MBIST tests

Typical Frequency for scan -shift is 10MHZ .
For MBIST slow clock (WRCK/tck) is 10MHZ and fast is same as functional frequency.
by RENU
Fri May 02, 2014 6:40 pm
Forum: Synthesis & Timing
Topic: What is Negative Setup Time and Negative Hold Time Concept ?
Replies: 2
Views: 7396

Re: What is Negative Setup Time and Negative Hold Time Conce

Very nice explanation .. Thanks Narveer :)
by RENU
Wed Apr 23, 2014 2:47 pm
Forum: Design For Testing (DFT)
Topic: Minimum number of scan chain in a design
Replies: 2
Views: 7574

Re: Minimum number of scan chain in a design

Minimum number of scan chains in a design can be decided by following factors :- 1. Number of Input - Output ports which can be use for Scan -In /Scan -out . 2. Whether you want to insert CODEC(Compresssor -Decompressor) / Serializer in your design. 3. Scannable flops in your design . Simply , Minim...