Designing a NAND gate with "my gate"

All queries related to number system, flip-flops, logic designs and CMOS based digital circuits.
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Joined: Thu Apr 10, 2014 11:40 am

Designing a NAND gate with "my gate"

Post by Balu_madaraju » Wed May 28, 2014 9:49 am

A gate named my gate takes two inputs A and B and gives the output Y = A+B'

Design a NAND gate only using my gates
(any number of my gates can be used)

Posts: 3
Joined: Sun Apr 27, 2014 10:16 pm

Re: Designing a NAND gate with "my gate"

Post by GayathriJeyaram » Wed May 28, 2014 11:30 am

First level,
2 gates. Gate 1 has inputs 0 and A. Gate 2 has inputs B and 1.

Second level
1 gate. Gate 3 has inputs output of gate 1 and output of gate 2.

In the description of the gates above with boolean function y= A+B' , the first input is A pin and second input is B pin.

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