Intern and Regular Positions at GLOBALFOUNDRIES India

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Pardeep Kumar
Posts: 40
Joined: Tue Apr 08, 2014 3:21 pm

Intern and Regular Positions at GLOBALFOUNDRIES India

Post by Pardeep Kumar » Wed Dec 21, 2016 7:06 pm

There are some openings both for intern and regular positions. If anybody is interested then please send the resume to pkvlsikuk@gmail.com

Intern:
Duration: 6 Months
Starting: Jan/Feb 2017
Education: Currently pursuing a Masters Degree in Electronics (Microelectronics, VLSI, embedded, power etc but with a fair amount of coding skills) or IT or Computer Science
Knowledge of Tcl, PHP, Oracle, MySQL and EDA experience in Mentor / Synopsis / Cadence etc will be a plus.
The project cannot be used as a topic for the candidate’s Masters thesis/report.
Project Work: Migration of the infrastructure used to run the Boolean/OPC/Verification code and tools from one platform to another.


Regular Position:
Position Title: Senior Engineer, Tapeout Engineering
Work Area: Design-to-Mask Engineering
Location: Bangalore, IN
Summary of Role:
GLOBALFOUNDRIES is seeking a highly motivated Tapeout Engineer to become part of the Design-2-Mask organization. This experienced technical individual contributor will be responsible for supporting GLOBALFOUNDRIES’ advanced technology Tapeouts. Working on the leading edge technologies will provide an opportunity to develop new methodologies and business practices aimed at a highly efficient and world-class Data Prep operations. This position will be based in BLR, IN.

Essential Responsibilities:
● Develop methodologies and systems supporting next generation Mask Data Prep (MDP) operations.
● Develop scripts and automated tools to improve the quality and cycle-time of Tapeouts.
● Manage tapeout projects from pre-tape-in to Release to mask write. Collaborate with tapeout stakeholders to define:
○ Design services and data preparation flows
○ Long-term scalable strategies for each element or operation in the flow
○ Schedule management, schedule analysis, risk assessment, risk mitigation
● Lead the daily Data-Prep operations supporting all Testchip, MPW, and Product Tapeouts for 22nm and below.
● Collaborate and interface with other technical and program management teams to manage Tapeout schedule.
● Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs

Required Qualifications:
● BS/BTech + 2-4 years of experience or MS/MTech + 0-2 year
● Experience in Unix/Linux environment including knowledge in shell scripting.
● Experience in Perl, Tcl, PHP, Oracle, MySQL.
● EDA experience in Mentor, Cadence, Synopsis or BRION tools will be a plus.
● Experience in DRC, OPC, or Mask Technology will be a plus.

Pardeep Kumar
Posts: 40
Joined: Tue Apr 08, 2014 3:21 pm

Re: Intern and Regular Positions at GLOBALFOUNDRIES India

Post by Pardeep Kumar » Mon Jan 30, 2017 6:40 pm

New regular positions:
If you interested in following jobs then please send the resume to pkvlsikuk@gmail.com
Position:1 -----------------------------------------
Position Title: SMTS Low Power Methodology
Work Area: Engineering Location: Bangalore, India

Required Qualifications: M.Tech
· 2-8 Years of experience
· This position is required in the team which is responsible for defining and implementing low power architecture, implementation/verification techniques and required tool/flow/methodology for ASIC designs.
· Candidate need to be able to understand IP/Library and have hands-on experience in implementing/verifying low power in designs, in the area of Synthesis, physical implementation and signoff.
· Additionally, Candidate need to be well versed with the design methodologies and tools to be able to define/automate them and enable new methodologies in the domain of Low Power.
· Candidate will be responsible for development/refinement of advanced solutions in the area of power refinement and management.
· Candidate will play a key role in development or defining micro-architecture strategies for low power, improved power integrity, performance and area. Candidate will be required to work with cross-functional teams to devise and validate the low power implementation.

Position:2 -----------------------------------------
Position Title: Senior MTS - DFT Architecture and Design
Work Area: Engineering Location: Bangalore, India
Required Qualifications: M.Tech
· 2-8 Years of experience
· This position is required in the team which is responsible for implementing DFT / Test on complex IP and SOC for ASIC designs.
· Candidate need to be able to understand DFT/Test architecture.
· Candidate need to have hands-on experience in implementing DFT/Test in designs in the area of DFT Synthesis, verification and pattern generation/simulation.
· Additionally, Candidate need to be well versed with the design methodologies and tools to be able to benchmark them and enable new methodologies in the domain of DFT/Test.
· Candidate will be responsible to implement DFT/Test on IP/SoC design for DFT Synthesis, verification and pattern generation/simulation.
· Candidate will work with worldwide design teams and research teams to influence the DFT/Test roadmap.

Position:3 -----------------------------------------
Position Title: Design Eng Engineer (Application Engineer)
Work Area: Engineering Location: Bangalore, India
Required Qualifications: Bachelors in Electrical/Electronics engineering with 2+ years of experience. Good aptitude in programming and understanding of basic circuits.

Responsibilities
1. PCB design and layout for reference designs.
2. Application reference basic build, debug and characterization.
3. Lab tools automation.
4. Lab component inventory management.
5. Soldering of SMD components for debug.

Skills required
1. Cadence Allegro, Kicad for PCB schematic/layout design
2. Experience with use of oscilloscopes/DMM's power supplies
3. Well versed in C++ and object oriented programming concepts. Knowledge of Visual Basic is an advantage
4. Micro controller programming
5. Ability to assemble application references in prototype quantity and SMD soldering for debug

Position:4 -----------------------------------------
Position Title: Design Eng Engineer (Principal Power Engineer)
Work Area: Engineering Location: Bangalore, India
Required Qualifications: Master in Electrical/Electronics engineering with
· 10+ years of experience in analog mixed signal design
· An expert & hands on working knowledge in Power management domain. Should be well versed with current mode, voltage mode control and various power control topologies. The candidate should have the ability to perform control loop analysis both in discrete and continuous domain. Digital power control is an added plus.
· Good aptitude in programming and fundamental understanding of analog circuits. Very good digital basics to implement analog systems digitally through software or digital hardware.
· The candidate should have seen a minimum of 2 full blown product IC cycle.
· The candidate should be self-motivated and should be able to work in a team environment.
Responsibilities:
Architecture analysis and system behaviour modelling
Mixed signal circuit design for power management IC’s
Implement analog systems digitally
Should be able to create reference designs using IC’s and test & debug them
Guide and groom junior engineers in the IC product life cycle
Generate microcode for firmware based power applications

-----------------------------------------

DeenaJoshi
Posts: 3
Joined: Fri Feb 10, 2017 11:28 am
Location: kuwait
Contact:

Re: Intern and Regular Positions at GLOBALFOUNDRIES India

Post by DeenaJoshi » Fri Feb 10, 2017 12:11 pm

hi,
Thank you so much for posting this job requirement. I will try applying to this. Hope everything goes well.
iso 27001 certification
haccp certification


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