How to convert hdl code to transiter level design, stick dia

[rkguptha]

I wrote verilog code for conditional incrementer/decrementer will u please tell me how to convert and which toll is prefereable to use that to in layout , schematic and gatelevel ,transiter level design and which tools or used and those or open sorce or not please suggest me.

Thanks

[Narveer]

You can use Fedora Electronic lab, its open source. You need have a linux installed on your machine to run this.

http://spins.fedoraproject.org/fel/