difference between single condition, BCWC mode and OCV mode

Synthesis, timing closure, fixing setup & hold, constraints related questions can be asked here.
Post Reply
Netrapal
Posts: 19
Joined: Sat May 10, 2014 10:26 pm
Location: Gurgaon, India

difference between single condition, BCWC mode and OCV mode

Post by Netrapal » Wed May 14, 2014 2:24 pm

What is the difference between single condition mode, BCWC mode, OCV mode?

User avatar
Narveer
Posts: 59
Joined: Tue Apr 08, 2014 11:29 am
Location: Bangalore, INDIA

Re: difference between single condition, BCWC mode and OCV m

Post by Narveer » Sat Jun 07, 2014 6:43 pm

In single condition mode, maximum slew is propagated for all analysis types, irrespective of setup or hold. The maximum slew is the worst slew of all the inputs of a multi-input gate.

In BCWC mode, max slew is propagated during setup analysis and min slew is propagated during hold analysis. Again, max slew is the maximum slew of all inputs of an a multi-input gate, and min slew is the minimum. This mode has the following advantages:

It does simulataneous analysis of both setup and hold instead of requiring two runs.
It analyzes setup with worst (max) slew, and hold with best (min) slew, which is more conservative than single condition type in hold analysis.

In OCV mode, two different PVT conditions are used to give timing variation. During setup analysis, PrimeTime uses max slew for data launching path and data, and min slew for data capturing path. During hold analysis, PrimeTime uses the reverse, min slew for data launching path and datapath, and max slew for data capturing path. Also, in this mode, both max and min paths are derated based on user settings. This gives more pessimism to account for PVT variations across a die. Generally, it is recommended that you enable CRPR (clock convergence pessimism removal) to reduce pessimism in this mode. In fact, PrimeTime SI always uses OCV as its mode of operation.

Typically, single condition setup analysis is performed before layout, since the design may not accurately reflect clock tree structure, and delays may be based on wire load models. Although it is recommended that you use BCWC mode to test the two corners after layout, the scope of the analysis can be further extended with OCV mode. The different blocks of a chip can be modeled for different PVT conditions, and thus more conservative analysis can be done with OCV mode. This may require multiple runs with different analysis types at different corners of the operating conditions.

Post Reply