Open-Silicon VLSI Trainees [May 2019]

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evlsixsb_admin
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Open-Silicon VLSI Trainees [May 2019]

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Open-Silicon is looking for VLSI Trainees. (Looking for Fresh Graduates 2019 only)
Location: Bangalore
Availability: As soon as possible
Duration: 6 Months

Job Description:-
Trainees will work on physical design of Application-Specific Integrated Circuits (ASICs), as well as on test circuit insertion in these circuits. The work will entail checking sequential circuit timing using Static Timing Analysis (STA) tools, and fixing timing violations. Trainees must demonstrate ability to learn quickly, rapidly master complex tasks, and quickly build a high level of competency in Unix and in scripting with languages such as Tcl, Perl or Python. To qualify for the traineeship, candidates must demonstrate sound understanding of CMOS technology, CMOS logic circuits, and sequential circuit timing. A good grasp of electronic engineering fundamentals is essential. Candidates must also be able to code in any programming language.

Interested candidates can share their CV at Trainees@open-silicon.com
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