floorplanning: spacing between two macros/memories

All question related to floorplanning, power planning, placement, clock tree synthesis (CTS), routing, DRC cleaning, LVS, power, IR drop, Electromigration (EM), ESD, package.
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floorplanning: spacing between two macros/memories

Post by Vijay » Mon May 05, 2014 3:55 pm

How to decide on minimum space between two macros? What are the thing needs to taken care to make a good floorplan.?
Last edited by Vijay on Mon May 05, 2014 4:00 pm, edited 2 times in total.

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Re: floorplanning: spacing between two macros/memories

Post by Narveer » Mon May 05, 2014 4:21 pm

The formula to calculate spacing between two macro is (width+spacing x number of pins /vertical routing layers) + spacing. It is better adding an additional spacing because you can avoid violation with the side of macros.

Tips for macro Placement /Floorplanning :

1. Place macros around chip periphery.
If you don’t have reasonable rationale to place the macro inside the core area, then place macros around the chip periphery. Placing a macro inside the core can invite serious consequence during routing due to a lot of detour routing, because macros are equal to a large obstacle for routing. Another advantage to placing the hard macros around the core periphery is it's easier to supply power to them, and reduces the change of IR drop problems to macros consuming high amounts of power.
2. Consider connections to fixed cells when placing macros.
When you decide macro position, you have to pay attention to connections to fixed elements such as I/O and perplaced macros. Place macros near their associate fixed element. Check connections by displaying flight lines in the GUI.
3. Orient macros to minimize distance between pins.
When you decide the orientation of macros, you also have to take account of pins positions and their connections.
4. Reserve enough room around macros.
For regular net routing and power grid, you have to reserve enough routing space around macros. In this case estimating routing resources with precision is very important. Use the congestion map from trialRoute to identify hot spots between macros and adjust their placement as needed.
5. Reduce open fields as much as possible.
Except for reserved routing resources, remove dead space to increase the area for random logic. Choosing different aspect ratio (if that option is available) can eliminate open fields.
6. Reserve space for power grid.
The number of power routes required can change based on power consumption. You have to estimate the power consumption and reserve enough room for the power grid. If you underestimate the space required for power routing, you can encounter routing problems.

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Re: floorplanning: spacing between two macros/memories

Post by vikramrajput » Wed Apr 08, 2015 12:37 pm

Thank you. It's very useful info.

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