IDDQ Testing Basics
Posted: Tue Nov 17, 2015 4:52 pm
IDDQ testing is based on the principle that complimentary CMOS does not draw any current from the power supply when it's inputs are static (i.e. not switching). In reality, however, there exists a small leakage current which typically is orders of magnitude smaller than the switching current. By this definition, all CMOS circuits are 100% IDDQ testable.
Faults detected by IDDQ tests:
Bridging Faults: Shorts between two nodes causing a voltage contention because they are being driven by two conflicting voltages. Sometimes also referred to as stuck-on faults.
Punch-through: Short between Drain and the source.
Resistive Shorts
Line and Gate Break Faults
Source or Drain Break Faults
Even some Delay Faults
Latch-Up
Stuck-open Faults
Faults detected by IDDQ tests:
Bridging Faults: Shorts between two nodes causing a voltage contention because they are being driven by two conflicting voltages. Sometimes also referred to as stuck-on faults.
Punch-through: Short between Drain and the source.
Resistive Shorts
Line and Gate Break Faults
Source or Drain Break Faults
Even some Delay Faults
Latch-Up
Stuck-open Faults